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Demonstration of 4H-SiC CMOS digital IC gates based on the mainstream 6-inch wafer processing technique

Tongtong Yang Yan Wang Ruifeng Yue

半导体学报（英文版）2022，Vol.43Issue(8)：73-76,4.

半导体学报（英文版）2022，Vol.43Issue(8)：73-76,4.DOI:10.1088/1674-4926/43/8/082801

Demonstration of 4H-SiC CMOS digital IC gates based on the mainstream 6-inch wafer processing technique

Tongtong Yang ¹Yan Wang ¹Ruifeng Yue²

作者信息

1. School of Integrated Circuits,Tsinghua University,Beijing 100084,China
2. Beijing National Research Center for Information Science and Technology,Beijing 100084,China
折叠

摘要

关键词

SiC/CMOS/integrated circuit/inverter/NAND/metal interconnect

Key words

SiC/CMOS/integrated circuit/inverter/NAND/metal interconnect

引用本文复制引用

Tongtong Yang,Yan Wang,Ruifeng Yue..Demonstration of 4H-SiC CMOS digital IC gates based on the mainstream 6-inch wafer processing technique[J].半导体学报（英文版）,2022,43(8):73-76,4.

半导体学报（英文版）

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ISSN：1674-4926

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