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Design and implementation of near-memory computing array architecture based on shared buffer

SHAN Rui GAO Xu FENG Yani HUI Chao CUI Xinyue CHAI Miaomiao

高技术通讯（英文版）2022，Vol.28Issue(4)：345-353,9.

高技术通讯（英文版）2022，Vol.28Issue(4)：345-353,9.DOI:10.3772/j.issn.1006-6748.2022.04.002

Design and implementation of near-memory computing array architecture based on shared buffer

SHAN Rui ¹GAO Xu ¹FENG Yani ¹HUI Chao ¹CUI Xinyue ¹CHAI Miaomiao²

作者信息

1. School of Electronic Engineering,Xi'an University of Posts and Telecommunications,Xi'an 710121,P.R.China
2. School of Computer,Xi'an University of Posts and Telecommunications,Xi'an 710121,P.R.China
折叠

摘要

关键词

near-memory computing/shared buffer/reconfigurable array processor/convolu-tional neural network ( CNN)

Key words

near-memory computing/shared buffer/reconfigurable array processor/convolu-tional neural network ( CNN)

引用本文复制引用

SHAN Rui,GAO Xu,FENG Yani,HUI Chao,CUI Xinyue,CHAI Miaomiao..Design and implementation of near-memory computing array architecture based on shared buffer[J].高技术通讯（英文版）,2022,28(4):345-353,9.

基金项目

Supported by the National Natural Science Foundation of China(No.61802304,61834005,61772417,61602377),the Shaanxi Province Key R&D Plan(No.2021GY-029). （No.61802304,61834005,61772417,61602377）

高技术通讯（英文版）

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ISSN：1006-6748

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