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A simplified hardware-friendly contour prediction algorithm in 3 D-HEVC and parallelization design

JIANG Lin DUAN Xueyao XIE Xiaoyan

高技术通讯(英文版)2022,Vol.28Issue(4):392-400,9.
高技术通讯(英文版)2022,Vol.28Issue(4):392-400,9.DOI:10.3772/j.issn.1006-6748.2022.04.007

A simplified hardware-friendly contour prediction algorithm in 3 D-HEVC and parallelization design

A simplified hardware-friendly contour prediction algorithm in 3 D-HEVC and parallelization design

JIANG Lin 1DUAN Xueyao 2XIE Xiaoyan3

作者信息

  • 1. Laboratory of Integrated Circuit Design,Xi'an University of Science and Technology,Xi'an 710054,P.R.China
  • 2. College of Safety Science and Engineering,Xi'an University of Science and Technology,Xi'an 710054,P.R.China
  • 3. School of Computer,Xi'an University of Posts and Telecommunications,Xi'an 710121,P.R.China
  • 折叠

摘要

关键词

depth modeling mode 4 (DMM-4)/contour prediction/3D high efficiency video coding (3D-HEVC)/parallelization/reconfigurable array processor

Key words

depth modeling mode 4 (DMM-4)/contour prediction/3D high efficiency video coding (3D-HEVC)/parallelization/reconfigurable array processor

引用本文复制引用

JIANG Lin,DUAN Xueyao,XIE Xiaoyan..A simplified hardware-friendly contour prediction algorithm in 3 D-HEVC and parallelization design[J].高技术通讯(英文版),2022,28(4):392-400,9.

基金项目

Supported by the National Natural Science Foundation of China(No.61834005,61772417,61802304,61602377,61874087,61634004)and the Shaanxi Province Key R&D Plan(No.2020JM-525,2021GY-029,2021KW-16). (No.61834005,61772417,61802304,61602377,61874087,61634004)

高技术通讯(英文版)

OAEI

1006-6748

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