计算机工程2023，Vol.49Issue(12)：10-24,15.DOI:10.19678/j.issn.1000-3428.0066548
面向E级超算系统的众核片上存储层次研究
Research on Manycore On-chip Storage Hierarchy for Exascale Supercomputer Systems
摘要
Abstract
Manycore has become the mainstream processor architecture for building HPC supercomputer systems,providing powerful computing power for High Performance Computing(HPC)exascale supercomputers.With the increasing number of cores integrated on manycore processor chips,the competition for large-scale cores for memory resources has become more intense.Manycore on-chip memory hierarchy is an important structure that alleviates the"memory wall"problem,aids HPC applications better play the computing advantages of manycore processors,and improves the performance of practical applications.The design has a significant impact on the performance,power consumption,and area of an on-chip system.The design of a many-call on-chip memory hierarchy has a significant impact on the performance,power consumption,and area of manycore systems.It is an important part of the structural design of manycore systems and is a research interest in the industry.Owing to the differences in the development history of manycore chips,the design technology of on-chip microarchitecture,and the different requirements of the application fields,the current HPC mainstream manycore on-chip storage hierarchy is different;however,from the perspective of horizontal comparison and the vertical development trend of each processor,as well as from the changes in application requirements brought by the continuous integration and development of HPC,data science,and machine learning,the hybrid structure of the SPM+Cache would most likely become the mainstream choice for the on-chip storage hierarchy designs of manycore processors in HPC exascale supercomputer systems in the future.For exascale computing software and algorithms,the designs and optimization based on the characteristics of the manycore memory hierarchy can aid HPC applications benefit from the computing advantages of manycore processors,thus effectively improving the performance of practical applications.Therefore,software,algorithm design,and optimization technology for the characteristics of the manycore on-chip storage hierarchy is also a research interest in the industry.This study first partitioned the on-chip memory hierarchy into multilevel Cache,SPM,and SPM+Cache hybrid structures according to different organizations,and then summarized and analyzed the advantages and disadvantages of these structures.This study analyzed the current status and development trend of the memory hierarchy designs of the chips of mainstream exascale supercomputer systems,such as the international mainstream GPU,homogeneous manycore,and domestic manycore.In summary,the research status of software and hardware technologies is related to the design and optimization of the memory hierarchy from the manycore of the manycore LLC management and cache consistency protocol,SPM management and data movement optimization,and the global perspective optimization of the SPM+cache hybrid architecture.Thus,this study looks forward to the future research direction of on-chip memory hierarchy based on different perspectives,such as hardware,software,and algorithm designs.关键词
E级超算/众核处理器/存储层次/高性能计算/便签式存储器/末级缓存Key words
Exascale supercomputer/manycore processor/storage hierarchy/High Performance Computing(HPC)/Scratchpad Memory(SPM)/Last Level Cache(LLC)分类
信息技术与安全科学引用本文复制引用
方燕飞,刘齐,董恩铭,李雁冰,过锋,王谛,何王全,漆锋滨..面向E级超算系统的众核片上存储层次研究[J].计算机工程,2023,49(12):10-24,15.基金项目
国家重点研发计划(2021FYB03011100). （2021FYB03011100）
