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一种新型高抗辐照可配置SOI器件技术

叶甜春 李博 刘凡宇 李多力 李彬鸿 陈思远

原子能科学技术2023,Vol.57Issue(12):2241-2253,13.
原子能科学技术2023,Vol.57Issue(12):2241-2253,13.DOI:10.7538/yzk.2023.youxian.0698

一种新型高抗辐照可配置SOI器件技术

A Novel Configurable SOI Technology with Extremely High Radiation Tolerance

叶甜春 1李博 2刘凡宇 2李多力 2李彬鸿 2陈思远3

作者信息

  • 1. 中国科学院微电子研究所,北京 100029||中国科学院大学,北京 100049
  • 2. 中国科学院微电子研究所,北京 100029||中国科学院大学,北京 100049||中国科学院硅器件技术重点实验室,北京 100029
  • 3. 中国科学院微电子研究所,北京 100029||中国科学院硅器件技术重点实验室,北京 100029
  • 折叠

摘要

Abstract

Deep space exploration,nuclear industry and high energy physics raise higher requirements for the radiation hardness of integrated circuits.However,the existing radiation hardening technologies,such as radiation hardness by design based on bulk silicon technology or silicon-on-insulator(SOI)process,are difficult to ensure that the electronics in spacecrafts and nuclear facilities function well in extreme space and nuclear radiation environments.In response to the lack of clear technical paths for the develop-ment of ultra-high radiation-hardened chip,a new type of highly radiation-hardened technique was introduced in this paper,named configurable SOI(CSOI).This technolo-gy innovatively employs twice bonding and cutting method to fabricate ultra-high radia-tion hardened 200 mm wafers with embedded configurable silicon layers.The 0.18 um CSOI complementary metal oxide semiconductor(CMOS)process was successfully developed,which opens up a new route to achieve radiation hardness through in-situ radiation compensation.After the fabrication of CSOI devices,the configuration layer voltage can be tuned flexibly to compensate for the performance degradation due to total ionizing dose(TID)effect and simultaneously suppress the parasitic transistor effect triggered by single event effects(SEE).This helps to improve the radiation hardness of the CSOI transistors.Technology computer aided design(TCAD)simulations validate the tuning mechanism of configurable layer that a negative bias does good to the hard-ness of both TID and SEE in N-type MOSFET.Based on the CSOI process platform,a design methodology for integrated circuits was developed through assessing the impact of tuning granularity(down to transistor level)and range(from-20 V to 5 V)of configurable layer on the performance and radiation tolerance of static random-access memory(SRAM)cell.Then,the optimized tuning strategy of configurable layer was determined,and a CSOI 4kb SRAM was designed and fabricated with high radiation tol-erance.The TID irradiation of the CSOI 4kb SRAM chip was performed at the 60 Co gamma irradiation source of Peking University and the SEE experiment was carried out at the Space Environment Simulation and Research Infrastructure(SESRI)in Harbin Institute of Technology.Radiation experiments confirm that the CSOI SRAM achieves up to a level of 6 Mrad(Si)for TID hardness and the threshold of single event upset is greater than 118(MeV·cm2)/mg,which reaches world-class levels.It is expected to be applied in extreme fields such as deep space exploration and nuclear emergency.

关键词

可配置SOI/抗辐照/总剂量效应/单粒子效应

Key words

configurable SOI/radiation hardness/total ionizing dose/single event effect

分类

能源科技

引用本文复制引用

叶甜春,李博,刘凡宇,李多力,李彬鸿,陈思远..一种新型高抗辐照可配置SOI器件技术[J].原子能科学技术,2023,57(12):2241-2253,13.

基金项目

国家重点研发计划(2022YFB4401700) (2022YFB4401700)

国家自然科学基金(U22B2043,62374184) (U22B2043,62374184)

原子能科学技术

OA北大核心CSCDCSTPCD

1000-6931

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