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基于DWC PCIE Core的数据传输系统设计

刘肖婷

铁路通信信号工程技术2024,Vol.21Issue(1):26-29,46,5.
铁路通信信号工程技术2024,Vol.21Issue(1):26-29,46,5.DOI:10.3969/j.issn.1673-4440.2024.01.005

基于DWC PCIE Core的数据传输系统设计

Design of Data Transmission System Based on DWC PCIE Core

刘肖婷1

作者信息

  • 1. 北京全路通信信号研究设计院集团有限公司,北京 100070||北京市高速铁路运行控制系统工程技术研究中心,北京 100070
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摘要

Abstract

In the railway signaling system,a data sending and receiving system based on DWC PCIE Core is designed to reduce the CPU resource occupancy of railway signaling system.The system adopts FPGA development board suite embedded with ARM Cortex-A9 dual core,which takes the advantage of the flexibility and scalability of FPGA,and uses configurable PCIE hard core IP module and configurable Ethernet hard core IP module.This paper mainly introduces the realization of high-speed and reliable data transmission through PCIE bus and Ethernet based on DMA modules between Host PC and FPGA and between FPGA boards.

关键词

DWC PCIE Core/FPGA/数据传输/DMA

Key words

DWC PCIE Core/FPGA/data transmission/DMA

分类

交通工程

引用本文复制引用

刘肖婷..基于DWC PCIE Core的数据传输系统设计[J].铁路通信信号工程技术,2024,21(1):26-29,46,5.

基金项目

国家重点研究计划项目(2022YFB4300600) (2022YFB4300600)

铁路通信信号工程技术

1673-4440

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