通信与信息技术Issue(2)：15-20,6.
基于FPGA的多通道高速串行数据采集系统设计
Design of multi-channel high-speed serial data acquisition system based on FPGA
摘要
Abstract
In order to meet the requirements of high-precision,high-speed and multi-channel data acquisition in the field of sat-ellite navigation signal anti-jamming,the system uses the 16 bit high-speed serial AD conversion chip AD9653 from ADI Company to complete analog-to-digital conversion,with the conversion accuracy of 16 bits and the highest conversion rate of 125MSPS.The char-acteristics of high-speed serial data interface of AD9653 are analyzed,and the chip synchronization technology provided by Kintex-7 series FPGA of Xilinx Company is adopted to carry out the research on bit clock adaptive phase calibration and data frame adjustment,which ensures the stability and correctness of high-speed serial data transmission.The internal FIFO data buffer is used to realize the on-chip synchronization of multi-channel data,so as to ensure the correct processing of the subsequent anti-interference algorithm.The research results show that the system is stable,reliable and correct when using this method for high-speed serial data acquisition.It provides a practical solution for multi-channel high-speed serial data acquisition,and has certain reference value for data acquisi-tion systems with similar requirements.关键词
高速数据采集/多通道/AD9653/片同步技术Key words
High speed data acquisition/Multi channel/AD9653/Chip synchronization technology分类
电子信息工程引用本文复制引用
安国臣,袁玉鑫,刘若凡,王晓君..基于FPGA的多通道高速串行数据采集系统设计[J].通信与信息技术,2024,(2):15-20,6.基金项目
河北省省级科技计划项目,新一代电子信息技术创新专项(项目编号:21310402D) （项目编号:21310402D）
