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基于FPGA的ICN名字解析缓存加速系统

李雪彤 陈晓 宋磊

现代电子技术2024,Vol.47Issue(7):109-114,6.
现代电子技术2024,Vol.47Issue(7):109-114,6.DOI:10.16652/j.issn.1004-373x.2024.07.019

基于FPGA的ICN名字解析缓存加速系统

Design of ICN name resolution acceleration system based on FPGA

李雪彤 1陈晓 1宋磊1

作者信息

  • 1. 中国科学院声学研究所 国家网络新媒体工程技术研究中心,北京 100190||中国科学院大学,北京 100049
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摘要

Abstract

Name resolution service is the key to retrieving information content in ICN(information-centric networking).Therefore,an FPGA-based ICN name resolution acceleration system is designed and proposed to enhance the efficiency of name resolution services and reduce the load on name resolution systems.This system offloads the name resolution function to FPGA on the data plane of network nodes,achieves the mapping storage of identifier-to-network address and processes forwarding data packets that require to find the network address.Additionally,the system supports dynamic configuration of mapping relationships on the control plane,and ensures the update of mapping storage.Experimental test results show that the proposed system achieves a forwarding rate of 4.6 Mpps for small packets when the test traffic is 10 Gb/s,with a request latency below 1.5 μs.In comparison with the traditional software-based key-value storage systems,the processing speed of the proposed system is increased by 27 times,and it is 4 times faster than the processing speed of software optimized with DPDK kernel bypass.

关键词

ICN/FPGA/名字解析/键值存储/SDN/哈希表/硬件加速/流水线

Key words

ICN/FPGA/name resolution/key-value storage/SDN/Hash table/hardware acceleration/pipeline

分类

信息技术与安全科学

引用本文复制引用

李雪彤,陈晓,宋磊..基于FPGA的ICN名字解析缓存加速系统[J].现代电子技术,2024,47(7):109-114,6.

基金项目

先导专项课题(XDA031050100) (XDA031050100)

现代电子技术

OA北大核心CSTPCD

1004-373X

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