太赫兹科学与电子信息学报2024，Vol.22Issue(3)：303-308,6.DOI:10.11805/TKYDA2021330
一种高速数字上变频的优化设计与实现方法
An optimal design and implementation method of high speed digital up conversion
周新星 1台啸 1李奇1
作者信息
- 1. 中国船舶集团有限公司第七二二研究所,湖北 武汉 430205
- 折叠
摘要
Abstract
The Software Defined Radio(SDR)requires that the Digital to Analog Converter(DAC)must have higher and higher sampling rate,and the bandwidth of the transmitted signal is wider and wider.The traditional method of the Digital Up Conversion(DUC)cannot meet the application requirements because of the limited clock frequency of the Field Programmable Gate Array(FPGA).An optimized design method of high speed DUC is proposed to improve interpolation filtering and digital frequency synthesis.Firstly,the mathematical model of high speed DUC is deduced and the traditional DUC structure is optimized and improved.The implementation structure of the efficient and flexible interpolation filtering,as well as the structure of the multichannel parallel digital frequency synthesis are designed.Secondly,the coefficients of interpolation filters are given as well as the computing method of phase parameters for parallel digital frequency synthesis.The hardware implementation shows that the function of the optimized method is correct,and the method is convenient for engineering application.The data rate of the output digital Intermediate Frequency(IF)signal can reach 960 MS/s.The optimized method can realize the interpolation of different multiples,and can also produce high speed Local Oscillator(LO)signals with different rates.It can meet the requirements of DUC applications which need to transmit wide band and high rate signals in SDR.关键词
数字上变频/高速率/多相滤波/现场可编程门阵列Key words
digital up conversion/high speed rate/poly-phase filter/Field Programmable Gate Array分类
信息技术与安全科学引用本文复制引用
周新星,台啸,李奇..一种高速数字上变频的优化设计与实现方法[J].太赫兹科学与电子信息学报,2024,22(3):303-308,6.
