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基于System Generator的卷积加速结构设计与实现

成鸿群 刘宜成 涂海燕 徐金鹏 王广泰

计算机应用与软件2024,Vol.41Issue(4):224-227,274,5.
计算机应用与软件2024,Vol.41Issue(4):224-227,274,5.DOI:10.3969/j.issn.1000-386x.2024.04.034

基于System Generator的卷积加速结构设计与实现

DESIGN AND IMPLEMENTATION OF CONVOLUTION ACCELERATION STRUCTURE BASED ON SYSTEM GENERATOR

成鸿群 1刘宜成 1涂海燕 1徐金鹏 1王广泰1

作者信息

  • 1. 四川大学电气工程学院 四川成都 610065
  • 折叠

摘要

Abstract

In order to solve the time-consuming and complicated operation problems in convolutional neural networks,this paper proposes a block-based pipeline acceleration method according to the parallelism characteristics of convolution operation,and designs the circuit on System Generator based on this method.Through the experimental verification on field-programmable gate array(FPGA),the design model can correctly output the convolution operation results.In the case of the same structure and input data,the design model can accelerate up to 258 times compared with ordinary CPU in calculation speed,and increase by nearly 40 times compared with server-level CPU,and has a good acceleration effect.

关键词

卷积神经网络/卷积运算/System Generator/现场可编程门阵列

Key words

Convolutional neural networks/Convolution operation/System Generator/FPGA

分类

信息技术与安全科学

引用本文复制引用

成鸿群,刘宜成,涂海燕,徐金鹏,王广泰..基于System Generator的卷积加速结构设计与实现[J].计算机应用与软件,2024,41(4):224-227,274,5.

基金项目

国家自然科学基金项目(81803056). (81803056)

计算机应用与软件

OA北大核心CSTPCD

1000-386X

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