应用于高速图像传感器的高线性度Latch-ADCOACSTPCD
High linearity Latch-ADC for high-speed image sensors
针对高速应用设备对CMOS图像传感器高速、高线性度的要求,本文在传统SS ADC(Single-Slope ADC,单斜模数转换器)的基础上,实现了一款应用于图像传感器的Latch-ADC,工作频率达到了 600 MHz.Latch-ADC可以多列像素共用一个Gray Code计数器,并通过Latch结构快速锁定和存储数据,实现了 SS ADC中Counter和SRAM的功能.本文采用110 nm工艺,实现了一种高速12位Latch-ADC.经过仿真验证,本文的Latch-ADC具有高线性度,每次转换的周期为7.094 μs,平均功率为180.3μW,转换功耗为1.279 nJ.
Aiming at the requirement of high-speed and high linearity of CMOS image sensor for high-speed application devices,this paper realizes a Latch-ADC applied to image sensor on the basis of traditional SS ADC(Single-Slope ADC,Single-Slope analog-to-digital con-verter),with an operating frequency of 600 MHz.Latch-ADC can use multi-column pixels to share a Gray Code Counter,and quickly lock and store data through Latch structure,which realizes the functions of counter and SRAM in SS ADC.In this paper,a high-speed 12bit Latch-ADC is implemented by using 110 nm technology.Through simulation verification,the Latch-ADC in this paper has high linearity,with each conversion period of 7.094 μs,average power of 180.3 μW,and conversion power consumption of 1.279 nJ.
潘佳明;熊波涛;李兆涵;常玉春
大连理工大学集成电路学院,大连 116100北京航天控制仪器研究所,北京 100039
电子信息工程
高速应用设备CMOS图像传感器SS ADC高线性度Latch-ADC
high speed application devicesCMOS image sensorSS ADChigh linearityLatch-ADC
《集成电路与嵌入式系统》 2024 (005)
42-47 / 6
国家自然科学基金(62027826).
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