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A 16-bit 18-MSPS flash-assisted SAR ADC with hybrid synchronous and asynchronous control logic

Junyao Ji Xinao Ji Ziyu Zhou Zhichao Dai Xuhui Chen Jie Zhang Zheng Jiang Hong Zhang

Journal of Semiconductors2024,Vol.45Issue(6):P.3-12,10.
Journal of Semiconductors2024,Vol.45Issue(6):P.3-12,10.DOI:10.1088/1674-4926/23120049

A 16-bit 18-MSPS flash-assisted SAR ADC with hybrid synchronous and asynchronous control logic

Junyao Ji 1Xinao Ji 1Ziyu Zhou 1Zhichao Dai 2Xuhui Chen 2Jie Zhang 1Zheng Jiang 2Hong Zhang1

作者信息

  • 1. School of Microelectronics,Xi''an Jiaotong University,Xi''an 710049,China
  • 2. Qingdao Hi-image Tech.Co.Ltd.,Qingdao 266100,China
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摘要

关键词

SAR ADC/control logic/reference ringing/DAC incomplete settling

分类

信息技术与安全科学

引用本文复制引用

Junyao Ji,Xinao Ji,Ziyu Zhou,Zhichao Dai,Xuhui Chen,Jie Zhang,Zheng Jiang,Hong Zhang..A 16-bit 18-MSPS flash-assisted SAR ADC with hybrid synchronous and asynchronous control logic[J].Journal of Semiconductors,2024,45(6):P.3-12,10.

基金项目

supported by Qingdao Hi-image Technologies Co.,Ltd,and in part by the NSFC of China under Grant 62174149,61974118,62004156 ()

the National Key R&D Program of China under Grant 2022YFC2404902. ()

Journal of Semiconductors

OACSTPCDEI

1674-4926

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