集成电路与嵌入式系统2024，Vol.24Issue(6)：46-54,9.
基于深沟槽单次外延工艺超级结MOS器件耐压提升与优化
Voltage enhancement and optimization of super junction MOS devices based on deep trench single epitaxial process
田俊 1付振 1张泉 1肖超 1张文敏 1王悦1
作者信息
- 1. 北京智芯微电子科技有限公司,北京 102200||北京芯可鉴科技有限公司,北京 102200
- 折叠
摘要
Abstract
In this paper,a mainstream technology for manufacturing super junction MOS(SJMOS)devices,namely the Deep Trench Sin-gle Epitaxial Process(DTSE),is introduced.And the flow and characteristics of DTSE are described in detail.Based on the charge bal-ance principle of SJMOS,the variation of breakdown voltage(BV)under different P-pillar doping concentrations is analyzed,revealing the reasons for the low BV.A improvement solution is proposed,and its feasibility is demonstrated through the experimental verification.关键词
超级结MOS/电荷平衡/深沟槽/P柱宽度调整/耐压BVKey words
super junction MOS/charge balance/deep trench/P pillar width adjustment/voltage withstand BV分类
信息技术与安全科学引用本文复制引用
田俊,付振,张泉,肖超,张文敏,王悦..基于深沟槽单次外延工艺超级结MOS器件耐压提升与优化[J].集成电路与嵌入式系统,2024,24(6):46-54,9.
