通信学报2024，Vol.45Issue(5)：140-150,11.DOI:10.11959/j.issn.1000-436x.2024053
基于FPGA的SM4算法高效实现方案
Efficient implementation scheme of SM4 algorithm based on FPGA
摘要
Abstract
To address the inefficient data processing performance and excessive resource utilization issues that field-programmable gate array(FPGA)-based SM4 implementations faced,an implementation scheme that adopted both itera-tion and pipeline in order to reduce resource consumption and improve throughput was proposed.A combination of cy-clic key extension and 32 bit pipeline encryption and decryption architecture was adopted by the proposed scheme.The cyclic key extension reduced logical resource consumption,while the 32 bit pipeline encryption and decryption improved data throughput.Additionally,an algebraic S-box that combined linear operations to select an optimal matrix from those generated by different irreducible polynomials was employed.Resource usage and computation overhead was further minimized,thus achieving an increased engineering frequency.Experimental results demonstrate a 43% throughput im-provement and a 10% reduction in resource usage compared to the current best scheme.关键词
SM4算法/FPGA实现/流水线架构/代数式S盒Key words
SM4 algorithm/FPGA implementation/pipeline architecture/algebraic S-box分类
信息技术与安全科学引用本文复制引用
张宏科,袁浩楠,丁文秀,闫峥,李斌,梁栋..基于FPGA的SM4算法高效实现方案[J].通信学报,2024,45(5):140-150,11.基金项目
国家自然科学基金资助项目(No.U23A20300,No.62072351) （No.U23A20300,No.62072351）
陕西省自然科学基础研究计划重点基金资助项目(No.2023-JC-ZD-35) （No.2023-JC-ZD-35）
陕西省自然科学基础研究计划基金资助项目(No.2023-JC-YB-500) The National Natural Science Foundation of China(No.U23A20300,No.62072351),The Key Research Project of Shaanxi Natural Science Foundation(No.2023-JC-ZD-35),The Natural Science Basic Research Plan in Shaanxi Province of China(No.2023-JC-YB-500) （No.2023-JC-YB-500）
