现代电子技术2024，Vol.47Issue(14)：15-19,5.DOI:10.16652/j.issn.1004-373x.2024.14.003
基于ZYNQ-7000的飞控计算机PC/104总线数传链路设计
Design of ZYNQ-7000 based PC/104 bus data transmission link of flight control computer
晏鹏鹏 1张玉民 1盛蔚1
作者信息
- 1. 北京航空航天大学 仪器科学与光电工程学院,北京 100191
- 折叠
摘要
Abstract
In allusion to the problem of insufficient inherent performance and poor scalability of the original flight control computer caused by the development of multi-module and multi-type interface resources,a flight control computer framework based on ARM+FPGA hardware and software cooperation and taking PC/104 as a multi-module communication bus is proposed.In this framework,a dual-channel data buffer path is designed to improve the bandwidth mismatch between PC/104 bus and system main memory transmission.The PC/104 bus control is realized by IP designed in FPGA,and the high-speed data cache between bus and main memory is realized by means of DMA.The experimental results show that the designed flight control computer data link can realize 40 Mb/s data transmission speed between PC/104 buse between modules,and realize high-speed data exchange with microsecond delay between peripherals and system main memory by the bus,which ensures the data transmission efficiency of multi-module operation.关键词
飞控计算机/PC/104总线/ZYNQ-7000/FPGA/DMA数传链路/数据交换Key words
flight control computer/PC/104 bus/ZYNQ-7000/FPGA/DMA data transmission link/data exchange分类
电子信息工程引用本文复制引用
晏鹏鹏,张玉民,盛蔚..基于ZYNQ-7000的飞控计算机PC/104总线数传链路设计[J].现代电子技术,2024,47(14):15-19,5.
