电子科技大学学报2024，Vol.53Issue(4)：481-486,6.DOI:10.12178/1001-0548.2023204
用于GEM-TPC探测器读出芯片的10 bit 20 MSPS SAR ADC设计
The Design of a 10 Bit 20 MSPS SAR ADC of the Readout Chip for GEM-TPC Detector
摘要
Abstract
With the continuous development of large-area gas electron multiplier-time projection chamber detectors, the density and integration of readout electronics are increasingly required. In this paper, a 10 bit, 20 MSPS successive approximation register analog-to-digital converter prototype chip is designed and fabricated by 180 nm CMOS process. Combining the SAR ADC chip with an analog front-end module and a digital signals processor, a fully digital front-end readout application specific integrated circuit for GEM-TPC is realized. The ADC is mainly composed of the DAC module, the dynamic comparator module, the asynchronous clock generation module and the SAR logic module. Simulation results show that when the input signal frequency is 1.836 MHz, the effective number of bits is 8.61 bit, and the core power consumption is about 3.3 mW/Ch.关键词
GEM-TPC/ASIC/SAR ADC/自举开关/动态比较器/异步SAR逻辑Key words
GEM-TPC/ASIC/SAR ADC/bootstrapped switch/dynamic comparator/asynchronous SAR logic分类
信息技术与安全科学引用本文复制引用
孙志坤,千奕,杨鸣宇,佘乾顺,赵红赟,蒲天磊,陆伟建,刘政强,张家瑞..用于GEM-TPC探测器读出芯片的10 bit 20 MSPS SAR ADC设计[J].电子科技大学学报,2024,53(4):481-486,6.基金项目
国家自然科学基金(11975293) （11975293）
