计算机工程与科学2024，Vol.46Issue(8)：1390-1394,5.DOI:10.3969/j.issn.1007-130X.2024.08.007
基于BOOM处理器的访存逻辑优化
Optimization of memory access logic in BOOM processor
摘要
Abstract
Although the Store instruction backtracking strategy adopted by BOOM processors solves the problem of data conflicts caused by out-of-order execution of memory access instructions,this strat-egy can lead to a large amount of pipeline flushing and reduce the processor performance.To address this,a correlation prediction method for memory access instructions is proposed.This method cancels the query operation before the Load instruction accesses memory and adds a Load instruction correlation prediction table.Only Load instructions that are predicted to be uncorrelated can be executed in disor-der.This method avoids a large amount of pipeline flushing while ensuring the correctness of program logic.The test program uses 7 subroutines under SPEC CPU 2006,and the experimental results show that the improved processor's execution performance is improved by 3.5％on average.关键词
乱序执行/访存指令/相关性预测Key words
out-of-order execution/memory access instruction/correlation prediction分类
信息技术与安全科学引用本文复制引用
周蔺宁,刘杰,李洪奎,付浩东,刘红海,肖浩..基于BOOM处理器的访存逻辑优化[J].计算机工程与科学,2024,46(8):1390-1394,5.基金项目
湖州市公益重点项目(2019GZ10) （2019GZ10）
浙江省重点实验室项目(2020E10017) （2020E10017）
