集成电路与嵌入式系统2024，Vol.24Issue(10)：9-18,10.DOI:10.20193/j.ices2097-4191.2024.0022
全环绕栅极场效应晶体管的Ⅰ-Ⅴ模型紧凑建模
Compact modeling of Ⅰ-Ⅴ model for gate-all-around field effect transistors
摘要
Abstract
A surface-potential-based Ⅰ-Ⅴ model for junctionless gate-all-around transistors is presented in this paper.Based on the one-di-mensional poisson equation,combined with the corresponding boundary conditions,the nonlinear system of transcendental equations based on physical principles in two analytical models is sequentially solved using the Runge-Kutta algorithm,establishing the numerical models of the surface potential,midpoint potential,and gate pressure.Subsequently,Pao-Sah integration is used to derive the drain current of gate-all-around field effect transistors through the results of the surface potential expressed in form of the intermediate parameter.The proposed physics-based Ⅰ-Ⅴ model results exhibit good agreements with numerical and experimental data,validating the feasibility of the modeling approach for gate-all-around field effect transistors.Moreover,this method realizes the combination of analytical and nu-merical models and achieves a good balance between accuracy and efficiency.关键词
无结型全环绕栅极场效应晶体管/Ⅰ-Ⅴ模型/表面电势/Pao-Sah模型Key words
junctionless gate-all-around transistors/Ⅰ-Ⅴ model/surface potential/Pao-Sah model分类
信息技术与安全科学引用本文复制引用
王诗淳,冯俊杰,张保钦,韩玉杰,徐传忠,曾霞,于飞..全环绕栅极场效应晶体管的Ⅰ-Ⅴ模型紧凑建模[J].集成电路与嵌入式系统,2024,24(10):9-18,10.基金项目
国家自然科学基金面上项目(62374046) （62374046）
福建省自然科学基金面上项目(2023J01ii1,2022J01293). （2023J01ii1,2022J01293）
