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基于RISC-V的模块复用SM4密码协处理器的设计

王经纶 王海婷 秋小强 陈逸风

集成电路与嵌入式系统2024,Vol.24Issue(10):49-55,7.
集成电路与嵌入式系统2024,Vol.24Issue(10):49-55,7.DOI:10.20193/j.ices2097-4191.2024.0019

基于RISC-V的模块复用SM4密码协处理器的设计

Design of module reuse SM4 cipher coprocessor based on RISC-V

王经纶 1王海婷 2秋小强 3陈逸风1

作者信息

  • 1. 青岛科技大学信息科学技术学院,青岛 266061||山东产业技术研究院,济南 250102
  • 2. 青岛科技大学信息科学技术学院,青岛 266061
  • 3. 山东芯慧微电子科技有限公司,济南 250102
  • 折叠

摘要

Abstract

In response to the current situation of massive network data volume,increasing attention and demands for network data confi-dentiality,an SM4 cipher coprocessor based on the Hummingbird E203 open-source RISC-V processor has been designed and imple-mented.Based on the Hummingbird E203 MCU platform,the SM4 cipher coprocessor has been extended through 5 custom extension instructions,allowing users to call the coprocessor core to encrypt and decrypt data by writing program code on the software side.Com-pared with no extension instructions,its throughput can reach 153.75 times.Simultaneously,by studying the SM4 encryption and decryption algorithm,implement module multiplexing for key extension and repeated encryption and decryption parts to reduce circuit area.Under the UMC 28 nm process,the combined area of the SM4 coprocessor is 7 098.8 μm2,with a maximum clock frequency of 200 MHz and a data throughput rate of 775.758 Mbit/s.The SM4 coprocessor can achieve a data throughput rate of 150.588 Mbit/s at a clock frequency of 100 MHz.

关键词

RISC-V/SM4/协处理器/硬件加速/指令扩展

Key words

RISC-V/SM4/coprocessor/hardware acceleration/ISA extension

分类

信息技术与安全科学

引用本文复制引用

王经纶,王海婷,秋小强,陈逸风..基于RISC-V的模块复用SM4密码协处理器的设计[J].集成电路与嵌入式系统,2024,24(10):49-55,7.

基金项目

国家自然科学基金项目(62204136). (62204136)

集成电路与嵌入式系统

OACSTPCD

1009-623X

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