集成电路与嵌入式系统2024，Vol.24Issue(12)：45-51,7.DOI:10.20193/j.ices2097-4191.2024.0033
基于高速串行总线的DSP+FPGA架构图像处理系统设计
Design of image processing system based on high-speed serial buses and DSP+FPGA architecture
摘要
Abstract
The high-performance DSP+FPGA architecture can meet the real-time processing requirements of the embedded image pro-cessing system for large amounts of data and complex algorithms.The traditional DSP+FPGA architecture uses the parallel external memory interface as the data transfer interface,with a large number of traces,difficult PCB wiring,and many failure points.The use of high-speed serial buses can solve the above problems.This paper proposes an image processing system based on high-speed serial buses and DSP+FPGA architecture.PCIe bus is used as the image data channel between DSP and FPGA,SRIO bus is used as the link be-tween DSP and DSP,and SGMII bus is used as the data channel between DSP and PHY chip.High-speed serial buses enable faster the data transfer rate,easier layout of the PCB,lower electromagnetic interference,and better noise immunity.The system designed in this paper has been deployed and operated stably in practical locations,which demonstrates that the design is feasible and the system is reliable.关键词
高速串行总线/PCIe/DSP/FPGA/DSP+FPGA架构Key words
high-speed serial bus/PCIe/DSP/FPGA/DSP+FPGA architecture分类
信息技术与安全科学引用本文复制引用
李佩斌..基于高速串行总线的DSP+FPGA架构图像处理系统设计[J].集成电路与嵌入式系统,2024,24(12):45-51,7.
