密码学报(中英文)2024,Vol.11Issue(6):1354-1369,16.DOI:10.13868/j.cnki.jcr.000741
低功耗软硬结合SM2算法实现
Implementation of Low-Power Software and Hardware Combination for SM2 Algorithm
摘要
Abstract
This study proposes a low-power software-hardware combined SM2 algorithm imple-mentation scheme.Utilizing a low-power Cortex-M0 processor to call the functionality module of the SM2 coprocessor in the hardware,it could be realized in RFID of restricted resources.To re-duce the power consumption and resource usage in the SM2 field arithmetic layer,this study designs low-power multipliers using both serial and parallel computations based on the KOM algorithm.Addi-tionally,optimizations such as modular reduction and merging of modular additions and subtractions are applied.In the multiple-point arithmetic layer,a width-w NAF scalar multiplication algorithm is adopted and partially improved,which maintains good security against SPA attacks while improv-ing performance and reducing power consumption by reducing computational complexity.This study adopts a software-hardware combined approach to implement the Barrett algorithm,SM2 signature,and verification algorithm,aiming to improve overall performance and reduce resource consumption.Experimental test results show that the SM2 coprocessor can compute arbitrary scalar points at a speed of 0.869 ms per calculation with a clock frequency of 50 MHz,consuming only 4.9µJ of energy.Through the software-hardware combination of Cortex-M0 and the SM2 coprocessor,the signature speed reaches 0.98 ms per calculation,and the verification speed is 1.74 ms per calculation.关键词
RFID/SM2算法/软硬件结合/低功耗Key words
RFID/SM2/hardware and software/low power分类
信息技术与安全科学引用本文复制引用
孔团结,郑昉昱,郭润,荆继武,张子昂..低功耗软硬结合SM2算法实现[J].密码学报(中英文),2024,11(6):1354-1369,16.基金项目
国家重点研发计划(2022YFB3103301)National Key Research and Development Program of China(2022YFB3103301) (2022YFB3103301)