集成电路与嵌入式系统2025，Vol.25Issue(3)：1-8,8.DOI:10.20193/j.ices2097-4191.2024.0084
低压超大功率PCB电源完整性分析
Analysis of power integrity for low-voltage high-power PCB
摘要
Abstract
A power integrity analysis is conducted for the layout and routing design of a domestic power verification board targeting a 48 V power input,with an output voltage of 0.8 V and a current requirement of 1 000 A.A simulation design strategy based on the power distribution network(PDN)is proposed.In the initial stage,an optimal layout is selected by comparing the voltage drop simulation re-sults with different PCB layouts.Then,through simulation analysis of the power plane and via current carrying capacity,the vias are optimized.The optimization measures significantly reduced the voltage drop by 14.5 mV,decreased the plane circuit density by 61％,lowered power system loss by 17.2 W,and halved the via current.Moreover,the thermal effect of using a heat sink is simulated,and the results show that the highest temperature dropped by 27.81 ℃ after the application of the heat sink.Finally,using power plane res-onance simulation analysis,the power plane resonance noise is successfully controlled within 0.001％of the output voltage.After board fabrication and actual measurement,the ripple noise of the verification board was controlled within 1％of the rated output voltage,and the overall efficiency exceeded 90％,reaching an industry-leading level.The results indicate that the simulation process strategy pro-posed in this paper can effectively improve the efficiency of PCB design,and avoid power integrity risks,such as excessive voltage drop loss,overcurrent,and overheating.关键词
PCB/电源完整性/电压降/电热耦合仿真/过孔通流能力/谐振仿真Key words
PCB/power integrity/IR drop/electro-thermal coupling simulation/through-hole flow capacity/resonance simulation分类
计算机与自动化引用本文复制引用
陈光,王刚,贾春波..低压超大功率PCB电源完整性分析[J].集成电路与嵌入式系统,2025,25(3):1-8,8.基金项目
并行与分布处理重点实验室基金(WDZC20235250113). （WDZC20235250113）
