无线电工程2025，Vol.55Issue(3)：511-519,9.DOI:10.3969/j.issn.1003-3106.2025.03.007
稳定STO振荡的前端读出ASIC芯片设计
Design of Front-end Readout ASIC for Stabilizing STO Oscillations
摘要
Abstract
Spin-Torque Oscillator(STO)has the advantages of ultra-small size,low power consumption and wide tuning range,and thus is expected to be a new generation of microwave signal source.However,under free-running oscillations,the phase noise of STO is large,which cannot satisfy the requirement for practical microwave applications.To address this problem,a front-end readout ASIC chip is designed for stabilizing STO oscillations.The digital-analog hybrid chip is mainly composed of a Variable Gain Amplifier(VGA)and an All-Digital Phase-Locked Loop(ADPLL),and the ADPLL is selected for its flexibility,scalability,better cross-process design,portability,and smaller area compared with analog circuits.Simulation results show that by using the ADPLL,the overall circuit power consumption is reduced to 0.704 μW compared with the traditional analog Phase-Locked Loop(PLL);the bandwidth is 2.5 MHz when the center frequency of the PLL is set to 300 MHz,which is more than five times higher compared with similar systems.关键词
自旋转矩纳米振荡器/适应锁相环系统/ASIC芯片Key words
spin-torque nano oscillator/adaptive PLL system/ASIC chip分类
电子信息工程引用本文复制引用
夏倩倩,曾蕙明..稳定STO振荡的前端读出ASIC芯片设计[J].无线电工程,2025,55(3):511-519,9.基金项目
国家重点研发计划青年科学家项目(2023YFB2407700)National Key Research and Development Program-Youth Scientist Project(2023YFB2407700) （2023YFB2407700）
