电子学报2025，Vol.53Issue(1)：84-93,10.DOI:10.12263/DZXB.20231210
一种应用于BIKE的基于Karatsuba算法的大尺寸多项式乘法器
A Large-Width Polynomial Multiplier Based on Karatsuba Algorithm for BIKE
摘要
Abstract
The current evaluation of the post-quantum cryptography(PQC)standardization program by the National Institute of Standards and Technology(NIST)has entered the fourth round.Bit flipping key encapsulation(BIKE)is one of four candidates currently being evaluated.In the key generation of BIKE,the polynomial multiplication consumes a lot of time and area resources,which is also one of the slowest and most area consuming operations in most cryptography sys-tems.In this work,we propose an overlap-free polynomial multiplier based on the Karatsuba algorithm(KA),which can ef-ficiently implement polynomial multiplication of tens of thousands of bits with low latency,high performance and small ar-ea.This multiplier is applied to the BIKE key generation algorithm,which is implemented in hardware architecture based on the field programmable gate array(FPGA),improving the original compact polynomial multiplication and polynomial in-version algorithm.The multiplier proposed in this article can adapt to different requirements for area and delay by using dif-ferent operand bit widths.Compared with BIKE's original design,the improved design reduces the delay of the key genera-tion module by 36.54%and the area delay production(ADP)by 10.4%.关键词
后量子密码(PQC)/多项式乘法器/Karatsuba算法(KA)/位翻转密钥封装(BIKE)Key words
post-quantum cryptography(PQC)/polynomial multiplier/karatsuba algorithm(KA)/bit flipping key encapsulation(BIKE)分类
信息技术与安全科学引用本文复制引用
杨柳,张永真,田静,宋苏文,王中风..一种应用于BIKE的基于Karatsuba算法的大尺寸多项式乘法器[J].电子学报,2025,53(1):84-93,10.基金项目
国家自然科学基金(No.62104097) National Natural Science Foundation of China(No.62104097) （No.62104097）
