太赫兹科学与电子信息学报2025,Vol.23Issue(4):340-345,359,7.DOI:10.11805/TKYDA2024573
高精确度大比特位延时器芯片研制
Design of high-accuracy and megabit True-Time Delay chip
陈月盈 1刘帅 1杨柳 1赵子润1
作者信息
- 1. 中国电子科技集团公司 第十三研究所,河北 石家庄 050051
- 折叠
摘要
Abstract
Based on the GaAs substrate Enhanced/Depletion-mode pseudomorphic High Electron Mobility Transistor(E/D pHEMT)process,a three-bit adjustable 1 400 ps Digital-Controlled Delay(DCD)chip operating in the 0.5~6 GHz frequency range has been developed.The chip measures 3.60 mm×4.00 mm×0.07 mm and integrates a three-bit digital-controlled delay line and a 3-bit parallel port drive circuit.Within the 0.5~6 GHz range,the DCD chip exhibits insertion loss of less than 11 dB,with insertion loss variation of less than±0.5 dB.The Voltage Standing Wave Ratio(VSWR)for both input and output is less than 1.5 across all states.The 1 400 ps delay error can be internally adjusted to±4 ps,achieving a delay quantity at the nanosecond level.By incorporating additional adjustable units and bonding cut-off methods,the delay accuracy is enhanced to 3‰.The chip features broadband operation,high precision,large delay quantity,and a compact size,making it well-suited for applications in antenna systems.关键词
宽带/大延时量/砷化镓/高精确度/微波单片集成电路(MMIC)Key words
broadband/large Time Delay(TD)/GaAs/high-accuracy/Monolithic Microwave Integrated Circuit(MMIC)分类
信息技术与安全科学引用本文复制引用
陈月盈,刘帅,杨柳,赵子润..高精确度大比特位延时器芯片研制[J].太赫兹科学与电子信息学报,2025,23(4):340-345,359,7.