计算机工程与科学2025，Vol.47Issue(4)：582-591,10.DOI:10.3969/j.issn.1007-130X.2025.04.002
轻量化卷积神经网络硬件加速设计及FPGA实现
Design and FPGA implementation of lightweight convolutional neural network hardware acceleration
李珍琪 1王强 1齐星云 1赖明澈 1赵言亢 1陆亿行 1黎渊1
作者信息
- 1. 国防科技大学计算机学院,湖南长沙 410073
- 折叠
摘要
Abstract
In recent years,convolutional neural networks(CNNs)have achieved remarkable results in fields such as computer vision.However,CNNs typically have complex network structures and sub-stantial computational requirements,making it difficult to implement them on portable devices with lim-ited computational resources and power consumption.FPGAs,with their high parallelism,energy effi-ciency,and reconfigurability,have emerged as one of the most effective computing platforms for accele-rating CNN inference on portable devices.This paper proposes a CNN accelerator that can be configured for different network structures,and optimizes its latency and power consumption through three as-pects:data reuse,pipeline optimization based on row buffers,and low-latency convolution techniques based on adder trees.Taking the YOLOv2-tiny lightweight network model as an example,a real-time target detection system was built on the Navigator ZYNQ-7020 development board.The experimental results show that the design meets low hardware and power requirements for portable devices,with 88％resource consumption and 2.959 W power consumption.It achieves a detection speed of 3.91 fps at an image resolution of 416×256.关键词
卷积神经网络/FPGA加速/加速器/便携设备Key words
convolutional neural network(CNN)/FPGA acceleration/accelerator/portable device分类
计算机与自动化引用本文复制引用
李珍琪,王强,齐星云,赖明澈,赵言亢,陆亿行,黎渊..轻量化卷积神经网络硬件加速设计及FPGA实现[J].计算机工程与科学,2025,47(4):582-591,10.
