集成电路与嵌入式系统2025，Vol.25Issue(5)：52-59,8.DOI:10.20193/j.ices2097-4191.2025.0006
基于RISC-Ⅴ的LMS算法加速方案
Acceleration scheme for LMS algorithms based on RISC-Ⅴ
摘要
Abstract
The Least Mean Square algorithm,as a typical adaptive filtering algorithm,has found extensive application in the field of noise suppression.Its implementation is mainly based on general-purpose processors,yet this method suffers from low computational efficiency and performance.The RISC-Ⅴ architecture,with the advantages of open-source,streamlining,and scalability,is suitable for the imple-mentation of dedicated processors.In this paper,a RISC-Ⅴ based specialized processor is designed for the LMS algorithm.The customized instruction set F extension is used to process floating point numbers,and MAC instructions are added to the coprocessor to complete the acceleration of the LMS algorithm.The experiment results show that the processor can realize effective noise cancellation,when the input signal-to-noise ratio is 5 dB,the signal-to-noise ratio after noise cancellation is 17.5 dB.When the system uses FPU to execute the LMS algorithm,the number of instruction execution is 220 354,and the execution cycle is 586 221.When this design scheme is used,operating in FPU+MAC mode,the number of instruction execution is 31 621,and the execution cycle is 89 412,dem-onstrating a remarkable improvement in efficiency.关键词
RISC-Ⅴ/协处理器/LMS/FPU/蜂鸟E203Key words
RISC-Ⅴ/coprocessor/LMS/FPU/Hummingbird E203分类
计算机与自动化引用本文复制引用
叶岸茏,马令坤,曲宗一..基于RISC-Ⅴ的LMS算法加速方案[J].集成电路与嵌入式系统,2025,25(5):52-59,8.基金项目
国家自然科学基金重点项目—复杂信息链路下对非合作海洋声学监测网络的感知方法(62031021). （62031021）
