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基于FPGA窄脉冲信号发生器的设计

胡克忠 王海涛

机电工程技术2025,Vol.54Issue(8):43-47,5.
机电工程技术2025,Vol.54Issue(8):43-47,5.DOI:10.3969/j.issn.1009-9492.2024.00175

基于FPGA窄脉冲信号发生器的设计

Design of Narrow Pulse Signal Generator Based on FPGA

胡克忠 1王海涛2

作者信息

  • 1. 东华理工大学机械与电子工程学院,南昌 330013
  • 2. 东华理工大学,南昌 330013
  • 折叠

摘要

Abstract

To address the problem of low capture efficiency of electron induction accelerator,considering that the pulse current signal generated by the electronic circuit method acting on the capture coil will cause temperature changes,electromagnetic interference,etc.A programmable narrow pulse signal generator is designed based on FPGA.Through modular design,it can output specific and stable pulse waveforms that meet requirements,the period of this pulse waveform is 300µs,the pulse width is about 3µs,the rising part of the waveform is an exponential curve,very fast response time,the descending part decays linearly.Using serial communication,the waveform data that meets the requirements(saved in TXT file format)can be written into the EEPROM of the FPGA at one time.This first ensures that data will not be lost after power failure,then reads and writes from EEPROM to RAM,finally,reads the waveform data from RAM.The results show that using MODESIM simulation,the simulation results are basically consistent with the on-board verification process,and the target waveform can be output well,verifying the feasibility of the pulse signal generator.

关键词

电子感应加速器/FPGA/可编程脉冲信号发生器/EEPROM/RAM IP核

Key words

electron induction accelerator/FPGA/programmable pulse signal generator/EEPROM/RAM IP core

分类

电子信息工程

引用本文复制引用

胡克忠,王海涛..基于FPGA窄脉冲信号发生器的设计[J].机电工程技术,2025,54(8):43-47,5.

基金项目

国防科工局"十三五"核能开发项目子课题(20201192-03) (20201192-03)

机电工程技术

1009-9492

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