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A 28 nm 576K RRAM-based computing-in-memory macro featuring hybrid programming with area efficiency of 2.82 TOPS/mm2

Siqi Liu Huaqiang Wu Songtao Wei Peng Yao Dong Wu Lu Jie Sining Pan Jianshi Tang Bin Gao He Qian

半导体学报（英文版）2025，Vol.6Issue(6)：111-119,9.

半导体学报（英文版）2025，Vol.6Issue(6)：111-119,9.DOI:10.1088/1674-4926/24100017

A 28 nm 576K RRAM-based computing-in-memory macro featuring hybrid programming with area efficiency of 2.82 TOPS/mm2

Siqi Liu ¹Huaqiang Wu ²Songtao Wei ¹Peng Yao ¹Dong Wu ¹Lu Jie ¹Sining Pan ¹Jianshi Tang ¹Bin Gao ²He Qian¹

作者信息

1. School of Integrated Circuits,Tsinghua University,Beijing 100083,China
2. School of Integrated Circuits,Tsinghua University,Beijing 100083,China||International Innovation Center of Tsinghua University,Shanghai 200062,China
折叠

摘要

关键词

computing-in-memory/on-chip programming scheme/hybrid programming/resistive random access memory/matrix-vector-multiplication acceleration

Key words

computing-in-memory/on-chip programming scheme/hybrid programming/resistive random access memory/matrix-vector-multiplication acceleration

引用本文复制引用

Siqi Liu,Huaqiang Wu,Songtao Wei,Peng Yao,Dong Wu,Lu Jie,Sining Pan,Jianshi Tang,Bin Gao,He Qian..A 28 nm 576K RRAM-based computing-in-memory macro featuring hybrid programming with area efficiency of 2.82 TOPS/mm2[J].半导体学报（英文版）,2025,6(6):111-119,9.

基金项目

This work was supported in part by the National Natural Science Foundation of China(62422405,62025111,62495100,92464302),the STI 2030-Major Projects(2021ZD0201200),the Shanghai Municipal Science and Tech-nology Major Project,and the Beijing Advanced Innovation Center for Integrated Circuits. （62422405,62025111,62495100,92464302）

半导体学报（英文版）

ISSN：1674-4926

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