| 注册
首页|期刊导航|集成电路与嵌入式系统|面向大规模FPGA的粗粒度并行布线方法研究

面向大规模FPGA的粗粒度并行布线方法研究

田春生 陈雷 王硕 周婧 王卓立 张瑶伟

集成电路与嵌入式系统2025,Vol.25Issue(6):68-77,10.
集成电路与嵌入式系统2025,Vol.25Issue(6):68-77,10.DOI:10.20193/j.ices2097-4191.2025.0024

面向大规模FPGA的粗粒度并行布线方法研究

Research on coarse-grained parallel routing method for large-scale FPGAs

田春生 1陈雷 1王硕 1周婧 1王卓立 1张瑶伟1

作者信息

  • 1. 北京微电子技术研究,北京 100076
  • 折叠

摘要

Abstract

Aiming at the problems such as excessive resource overhead,high memory consumption,and low routing efficiency in the rou-ting process of large-scale FPGAs,a resource-friendly coarse-grained parallel routing method tailored for large-scale FPGAs is proposed.First,a non-intrusive data optimization technique is proposed to reduce the resource overhead and memory consumption caused by the routing resource graph,addressing the memory explosion problem resulting from the increasing scale of FPGAs and providing a data foundation for the routing method.Second,adaptive load balancing and high-fanout net partitioning techniques are introduced to tackle the low parallelism in coarse-grained parallel routing,thereby improving the overall routing efficiency.The experimental results show that the proposed coarse-grained parallel routing method for large-scale FPGAs can achieve a 3.18× speedup in runtime while reducing resource and memory consumption by 90%,without compromising performance metrics such as wirelength and critical path delay.

关键词

现场可编程门阵列/粗粒度并行布线/自适应负载均衡/布线资源图/非侵入式数据优化

Key words

FPGA/coarse-grained parallel routing/adaptive load balancing/routing resource graph/non-intrusive data optimization

分类

电子信息工程

引用本文复制引用

田春生,陈雷,王硕,周婧,王卓立,张瑶伟..面向大规模FPGA的粗粒度并行布线方法研究[J].集成电路与嵌入式系统,2025,25(6):68-77,10.

基金项目

国家自然科学基金面上项目(62374138) (62374138)

集成电路与嵌入式系统

1009-623X

访问量0
|
下载量0
段落导航相关论文