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基于FPGA的实时高效稠密光流加速器

冯钰泰 徐文炀 陈璠 王稼兴 汤勇明 孙豪

集成电路与嵌入式系统2025,Vol.25Issue(6):78-86,9.
集成电路与嵌入式系统2025,Vol.25Issue(6):78-86,9.DOI:10.20193/j.ices2097-4191.2025.0021

基于FPGA的实时高效稠密光流加速器

Real-time efficient dense optical flow accelerator based on FPGA

冯钰泰 1徐文炀 1陈璠 1王稼兴 1汤勇明 1孙豪1

作者信息

  • 1. 东南大学电子科学与工程学院,南京 211189
  • 折叠

摘要

Abstract

The optical flow method constructs a dense motion field representation by analyzing the pixel displacements between frames,which can quantify the motion direction and velocity of objects in the scene with sub-pixel accuracy,and is a core technology for applica-tions such as body-awareness,intelligent sensing in low-altitude economy,and localization and navigation.However,the dense optical flow algorithm faces high computational complexity,and its multi-layer pyramid structure and inter-layer data dependencies lead to problems such as inefficient access and idle computational resources,which together limit the real-time and efficient deployment of the algorithm on the edge side.In order to solve this problem,this paper proposes a real-time and efficient FPGA hardware acceleration scheme for the dense LK pyramid optical flow algorithm based on the optimization strategy of co-designing algorithms,architectures and circuits.The scheme optimizes the algorithm accuracy and hardware friendliness through batch bilinear interpolation and temporal gradi-ent generation,optimizes the parallelism of hardware architecture through pyramid multilayer folding design,and optimizes the access efficiency of pyramid downsampling process through three-stage segmentation architecture,which significantly improves the energy effi-ciency and real-time performance of the dense LK optic flow computation.Measurements on the AMD KV260 platform show that the hardware accelerator achieves 102 times faster processing speed compared to high-performance CPUs,realizes 62 f/s real-time processing capability at 752×480 resolution,with an average endpoint error(AEE)of 0.522 pixel,and an average angular error(AAE)of 0.325°,providing both highly dynamic visual perception scenarios.This provides a hardware-accelerated solution with high accuracy and low la-tency for highly dynamic visual perception scenes.

关键词

FPGA/硬件加速器/软硬件协同设计/稠密光流/图像金字塔

Key words

FPGA/hardware accelerator/hardware and software co-design/dense optical flow/image pyramid

分类

电子信息工程

引用本文复制引用

冯钰泰,徐文炀,陈璠,王稼兴,汤勇明,孙豪..基于FPGA的实时高效稠密光流加速器[J].集成电路与嵌入式系统,2025,25(6):78-86,9.

集成电路与嵌入式系统

1009-623X

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