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一种多端口寄存器文件的全自动物理编译器

明天波 刘必慰 胡春媚 吴振宇 宋睿强 宋芳芳

计算机工程与科学2025,Vol.47Issue(6):976-987,12.
计算机工程与科学2025,Vol.47Issue(6):976-987,12.DOI:10.3969/j.issn.1007-130X.2025.06.004

一种多端口寄存器文件的全自动物理编译器

An automated physical compiler for multi-port register files

明天波 1刘必慰 2胡春媚 2吴振宇 2宋睿强 2宋芳芳1

作者信息

  • 1. 国防科技大学计算机学院,湖南长沙 410073
  • 2. 国防科技大学计算机学院,湖南长沙 410073||先进微处理器芯片与系统重点实验室,湖南长沙 410073
  • 折叠

摘要

Abstract

In the design of application-specific microprocessors,designers need to iteratively experi-ment with different architectural parameters to achieve optimal application support.Multi-port register files,as core components,still rely on full-custom design or traditional compiler-assisted design.How-ever,these methods often struggle to balance high performance requirements with design flexibility,making it difficult to achieve co-optimization with the architecture.This paper proposes a physical com-piler for multi-port register files,which can automatically and quickly generate register file circuits and layouts with specified capacity and port count.Additionally,this paper proposes an optimized port structure to enhance the parallel access performance of the register file and a performance-driven heuris-tic algorithm to achieve optimized placement and routing results.Experimental results show that the proposed compiler can generate register files in approximately tens of hours to meet co-optimization re-quirements,achieving 31.5%speed improvement and 28.8%power reduction compared to full-custom designs,as well as 20.7%higher speed and 33.9%lower power consumption relative to traditional compiler-assisted designs.

关键词

多端口寄存器文件/物理编译器/端口优化技术/启发式算法/计算机体系结构

Key words

multi-port register file/physical compiler/port optimization technique/heuristic algo-rithm/computer architecture

分类

计算机与自动化

引用本文复制引用

明天波,刘必慰,胡春媚,吴振宇,宋睿强,宋芳芳..一种多端口寄存器文件的全自动物理编译器[J].计算机工程与科学,2025,47(6):976-987,12.

计算机工程与科学

OA北大核心

1007-130X

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