现代电子技术2025,Vol.48Issue(13):173-180,8.DOI:10.16652/j.issn.1004-373x.2025.13.025
基于独立线长预测信息的低功耗驱动FPGA聚类算法
Low power driven FPGA clustering algorithm based on individual wirelength prediction information
摘要
Abstract
This paper targets low-power design for island-style FPGAs and proposes a low-power clustering algorithm based on individual wirelength prediction.By constructing a wirelength prediction model that accounts for topological structure,path-level differences,and reconvergent effects,the method enables effective estimation of interconnect dynamic power consumption.The high-power interconnects are preferentially clustered within logic blocks to reduce global power consumption.Experimental results show that the proposed method can reduce dynamic power consumption significantly across multiple benchmark circuits in comparison with the traditional algorithm P-T-VPack,with particularly notable improvements in clock network power efficiency.关键词
岛型FPGA/独立线长预测/低功耗/互连线/聚类/动态功耗Key words
island-style FPGA/individual wirelength prediction/low power/interconnect/clustering/dynamic power consumption分类
信息技术与安全科学引用本文复制引用
胡文庆,张娜,张黎,郭晓阳,蒿杰..基于独立线长预测信息的低功耗驱动FPGA聚类算法[J].现代电子技术,2025,48(13):173-180,8.基金项目
国家科技创新2030-"新一代人工智能"项目(2018AAA0103100) (2018AAA0103100)