兵工自动化2025，Vol.44Issue(7)：11-15,58,6.DOI:10.7690/bgzdh.2025.07.003
基于国产FPGA与SM4算法的总线通信加解密IP核设计
Design of Bus Communication Encryption and Decryption IP Core Based on Domestic FPGA and SM4 Algorithm
李森 1袁强 1唐建1
作者信息
- 1. 中国兵器装备集团自动化研究所有限公司特种计算机事业部,四川 绵阳 621000
- 折叠
摘要
Abstract
An IP core based on SM4 encryption and decryption algorithm is designed to meet the encryption requirements of bus communication between terminal devices and the requirements of convenient transplantation and development of encryption hardware programs.A lightweight single-round loop iteration structure is adopted to reduce the consumption of FPGA logic resources while meeting the throughput requirements,wherein the consumption of a lookup table(LUT)is 2 447,and the consumption of a flip-flop(FF)is 2 914;The independent operation mode of encryption and decryption is adopted,so that the encryption operation and the decryption operation in the communication process can be carried out at the same time without mutual interference;A"linear transformation parameter controllable"mechanism is used to change the encryption security from a single key as a guarantee to a double guarantee of"key+linear transformation parameter",which improves the security of encryption.The test results show that the IP core can be applied to the data encryption of UART(485/422/232),CAN,1553B and other buses under the condition of meeting the throughput requirements,and the performance is stable.关键词
FPGA/SM4算法/IP核/线性变换参数可控Key words
FPGA/SM4 algorithm/IP core/controllable parameters of linear transformation分类
信息技术与安全科学引用本文复制引用
李森,袁强,唐建..基于国产FPGA与SM4算法的总线通信加解密IP核设计[J].兵工自动化,2025,44(7):11-15,58,6.
