集成电路与嵌入式系统2025，Vol.25Issue(8)：10-22,13.DOI:10.20193/j.ices2097-4191.2025.0041
ROM-SRAM混合存内计算架构综述
A review on ROM-SRAM hybrid compute-in-memory architecture
摘要
Abstract
Neural networks are representative algorithms of artificial intelligence,but their huge number of parameters poses new chal-lenges to their hardware deployment at the edge.On the one hand,for the flexibility of applications,computing hardware is required to be able to transfer the deployed model between tasks through parameter fine-tuning at the edge.On the other hand,in order to improve computing energy efficiency and performance,it is necessary to implement large-capacity on-chip storage to reduce off-chip memory ac-cess costs.The recently proposed ROM-SRAM hybrid compute-in-memory architecture is a promising solution under mature CMOS technology.Thanks to the high-density ROM-based compute-in-memory,most of the weights of the neural network can be stored on the chip,cutting the reliance on off-chip memory access.Meanwhile,SRAM-based compute-in-memory can provide flexibility for edge com-pute-in-memory based on high-density ROM.To expand the design and application space of ROM-SRAM hybrid compute-in-memory architecture,it is necessary to further improve the density of ROM-based compute-in-memory to support larger networks and explore solutions to obtain greater flexibility through a small amount of SRAM compute-in-memory.This paper introduces several common techniques to improve the memory density of ROM-based compute-in-memory,as well as the neural network fine-tuning methods based on the ROM-SRAM hybrid compute-in-memory architecture to improve flexibility.The solutions to the deployment of ultra-large-scale neural networks and the bottleneck of dynamic matrix multiplication in large language models with long sequences are discussed,and the outlook for the broad design space and application prospects of ROM-SRAM hybrid compute-in-memory architecture is provided.关键词
人工智能/神经网络加速器/存内计算/只读存储器/集成电路Key words
artificial intelligence/neural network accelerator/computing-in-memory/read-only memory/integrated circuit分类
信息技术与安全科学引用本文复制引用
杜禧瑞,尹国栋,陈一鸣,曾令安,于天熠,杨华中,李学清..ROM-SRAM混合存内计算架构综述[J].集成电路与嵌入式系统,2025,25(8):10-22,13.基金项目
国家自然科学基金(#U21B2030,#U24B6015,#92264204) （#U21B2030,#U24B6015,#92264204）
