集成电路与嵌入式系统2025，Vol.25Issue(8)：23-30,8.DOI:10.20193/j.ices2097-4191.2025.0046
低温存内计算芯片设计研究综述
Review on cryogenic in-memory computing chip design
摘要
Abstract
With the rapid advancement of cutting-edge technologies such as artificial intelligence and quantum computing,the demand for high-performance computing chips continues to increase.However,traditional von Neumann architectures are increasingly constrained by the memory wall and power wall,making it difficult to meet the computing demands of data-intensive applications.Cryogenic in-memory computing combines the superior electrical properties of cryogenic CMOS devices with the high bandwidth and low latency ad-vantages of in-memory computing architectures,providing a new solution to overcome computing bottlenecks.This review summarizes the key characteristics of CMOS devices and various memory media at cryogenic temperatures,systematically reviews representative ar-chitectures,key implementations,and performance metrics of cryogenic in-memory computing in the fields of artificial intelligence and quantum computing.Moreover,this review analyzes the challenges and development trends at the levels of device technology,circuit systems,and EDA tools.关键词
低温CMOS/存内计算/人工智能/量子纠错/量子计算/存储器Key words
cryogenic CMOS/in-memory computing/artificial intelligence/quantum error correction/quantum computing/memory分类
信息技术与安全科学引用本文复制引用
束宇豪,李怡霏,王禁城,刘伟强,哈亚军..低温存内计算芯片设计研究综述[J].集成电路与嵌入式系统,2025,25(8):23-30,8.基金项目
国家自然科学基金项目(U2441247,62425404) （U2441247,62425404）
张江实验室 （）
