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自旋磁随机存储器时间域存内计算方法研究

谭嘉惠 苏炯哲 周荣 张椿钲 蔡浩

集成电路与嵌入式系统2025,Vol.25Issue(8):53-63,11.
集成电路与嵌入式系统2025,Vol.25Issue(8):53-63,11.DOI:10.20193/j.ices2097-4191.2025.0045

自旋磁随机存储器时间域存内计算方法研究

Research on time-domain in-memory computing method for spin-transfer torque magnetic random access memory

谭嘉惠 1苏炯哲 2周荣 2张椿钲 3蔡浩2

作者信息

  • 1. 东南大学吴健雄学院,南京 211189
  • 2. 东南大学集成电路学院,南京 211189
  • 3. 东南大学电子科学与工程学院,南京 211189
  • 折叠

摘要

Abstract

Computing-In-Memory(CIM)based on Spin Transfer Torque Magnetic Random Access Memory(STT-MRAM)is expected to be an effective way to overcome the"memory wall"bottleneck.This paper proposes a high-energy-efficient CIM design scheme for STT-MRAM in the time domain:a custom series-connected memory cell structure,through the series connection of transistors and complementary MTJ design,forms a magnetic resistance chain of multiple rows of memory cells in the computing mode,and combines a time-domain conversion circuit to convert the resistance value into a pulse delay signal.Further,a complementary series array architec-ture is designed,generating differential time signals through the separate storage of positive and negative weights to support signed num-ber calculations.In terms of quantization circuit design,a Successive Approximation Register(SAR)Time-to-Digital Converter(TDC)is proposed,which adopts a structure combining a voltage-adjustable delay chain and a flip-flop.To achieve multi-bit multiply-accumu-late operations,a signed number weight encoding scheme and a digital post-processing architecture are proposed.Through encoding weight mapping and digital shift-accumulate algorithms,the 8-bit input and 8-bit weight multiply-accumulate operation is decomposed into low 5-bit time-domain calculation and high-bit digital-domain calculation,outputting a 21-bit full-precision result.Based on the 28 nm CMOS process,the layout design and post-simulation were completed.At 0.9 V voltage,a 9-bit multiply-accumulate operation with a resolution margin of 270 ps was achieved,with an energy consumption of only 16 fJ per operation.The designed 5-bit SAR-TDC achieves high linearity conversion from time to digital.A 9 Kb time-domain CIM macrocell with an area of 0.026 mm2 was designed,in-cluding a memory cell array,SAR-TDC module,computing circuit,and read-write control circuit.The macrocell can achieve energy ef-ficiencies of 26.4 TOPS/W and 42.8 TOPS/W when performing convolutional layer and fully connected layer calculations,respectively,while achieving 8-bit precision calculation and an area efficiency of 0.523 TOPS/mm2.

关键词

磁性随机存储器/存内计算/时间域计算/逐次逼近型TDC

Key words

magnetic random access memory/computing-in-memory/time-domain computing/successive approximation register time-to-digital converter

分类

信息技术与安全科学

引用本文复制引用

谭嘉惠,苏炯哲,周荣,张椿钲,蔡浩..自旋磁随机存储器时间域存内计算方法研究[J].集成电路与嵌入式系统,2025,25(8):53-63,11.

集成电路与嵌入式系统

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