电工技术学报2025，Vol.40Issue(16)：5029-5043,15.DOI:10.19595/j.cnki.1000-6753.tces.241872
安全工作区外重复过电压硬开关下SiC MOSFET参数退化特性与机理
Degradation of SiC MOSFETs under Repetitive Overvoltage and Hard-Switching Stress Outside the Safe Operating Area
摘要
Abstract
In practical converters,Silicon carbide(SiC)MOSFETs may experience short-term,repetitive overvoltage and hard-switching stresses that exceed their safe operating area(SOA).These stresses can result from uneven voltage distribution in series configurations and parasitic inductances.However,current SiC MOSFET reliability studies focus on the effects of long-term and static stress within the SOA on device parameters,and discrepancies exist between the predicted and actual device lifetimes.This paper investigates the degradation of device parameters under overvoltage and hard-switching conditions.Tests are performed on two SiC MOSFETs with different voltage ratings to analyze static and dynamic parameter changes.The degradation mechanisms of device parameters are clarified through static overvoltage and gate-switching tests. Overvoltage and hard-switching tests at 80%of the actual breakdown voltage cause degradation of the gate oxide in the devices.After 60 hours of stress,the threshold voltage and on-resistance decrease,while the output and transfer characteristics shift to the left.Additionally,both gate leakage current and zero-gate-voltage drain current increase.For dynamic parameters,variations in transconductance and the Miller plateau voltage cause the two devices under test(DUTs)to exhibit different changes in switching characteristics.These characteristics mainly include turn-on and turn-off delay times and losses.Furthermore,in devices operating in the third quadrant,the expansion of stacking faults leads to an increase in the forward voltage drop of the body diode. Tests under static overvoltage and gate-switching conditions show that device parameter degradation is primarily due to dynamic overvoltage and current stress.At the same drain-source voltage,degradation in static characteristics from static overvoltage stress is much smaller than that from overvoltage switching stress,with dynamic characteristics remaining largely unaffected.Similarly,parameter changes in the gate-switching stress test are significantly reduced.Gate-switching and overvoltage hard-switching stress tests at different voltages reveal that higher gate-and drain-source voltage accelerate parameter degradation.Tests conducted at varying on-state times and switching frequencies show that threshold voltage degradation is mainly related to the number of switching cycles,with minimal impact from switching frequency and on-state times. Technology computer-aided design(TCAD)simulations verify the gate oxide degradation mechanism and analyze threshold voltage degradation.The electric field and temperature distribution in devices operating in the first quadrant show that the switching process accelerates gate oxide degradation.Changes in oxide charge simulate threshold voltage and on-resistance degradation.The temperature and current density distribution in devices operating in the third quadrant are also studied,confirming that parameter degradation is primarily due to semiconductor degradation,particularly stacking faults.A power-law model based on switching cycles is developed,incorporating the drain-source voltage to better describe the threshold voltage degradation under varying voltages.The accuracy of the degradation model is validated through experimental results under different operating conditions. Overvoltage and hard-switching stress accelerate the degradation of SiC MOSFET parameters,such as threshold voltage and on-resistance.These changes are primarily attributed to gate oxide degradation,which is accelerated by hot carrier injection under high electric fields.The drain-source voltage and the number of switching cycles influence threshold voltage variation.This research provides theoretical support for device applications under critical conditions and for selecting margins in converter design.关键词
加速寿命测试/SiC MOSFET/栅氧化层退化/硬开关Key words
Accelerated life testing/SiC MOSFET/gate oxide degradation/hard switching分类
信息技术与安全科学引用本文复制引用
张岩,薛少鹏,李阳,李现亭,刘进军..安全工作区外重复过电压硬开关下SiC MOSFET参数退化特性与机理[J].电工技术学报,2025,40(16):5029-5043,15.基金项目
国家重点研发项目(2021YFB2601503)和国家自然科学基金项目(52177193)资助. （2021YFB2601503）
