电工技术学报2025，Vol.40Issue(16)：5081-5091,11.DOI:10.19595/j.cnki.1000-6753.tces.241527
SiC MOSFET的短路耐受时间分析及其基于di/dt-PMOS的短路保护
Analysis of Short-Circuit Withstand Time of SiC MOSFET and Short-Circuit Protection Based on di/dt-PMOS
摘要
Abstract
The short-circuit tolerance of SiC MOSFETs is directly related to the heat generated during the short-circuit process,which is,in turn,directly related to the short-circuit current.Measuring short-circuit current characteristic curves under various parameters,including bus voltage,drive voltage,drive resistance,main circuit parasitic inductance,and gate threshold voltage,is essential.The impact of each parameter on the short-circuit current is analyzed to provide solutions for increasing the short-circuit withstand time(SCWT)of SiC MOSFETs.The drive voltage significantly influence the short-circuit current among these parameters,and lower gate voltage reduces the short-circuit current.Reducing the drive voltage can increase the SCWT of SiC MOSFETs.Additionally,the SCWT of SiC MOSFETs determines the maximum time for short-circuit protection actions.As a result,the settings of these different parameters directly affect the design of SiC MOSFET short-circuit protection circuits. In traditional SiC MOSFET short-circuit protection strategies,the induced voltage generated by the parasitic inductance between the Kelvin source and power source,in conjunction with an RC filter,charges the capacitor(C)when the SiC MOSFET current changes,providing real-time feedback on the magnitude of the short-circuit current through the voltage across C.When the voltage across C exceeds a set value,the state of the SiC MOSFET is regarded as a short circuit.However,this traditional method has inconsistent short-circuit current thresholds for triggering short-circuit protection actions in hard switching faults(HSF)and fault under load(FUL),leading to the failure of short-circuit protection.Capacitor discharge is the main reason when the SiC MOSFET is normally turned on,resulting in a high short-circuit current threshold in the FUL state compared to the HSF state.Therefore,this paper proposes a short-circuit protection strategy based on di/dt-PMOS.This strategy places the PMOS's drain and source in series between the parasitic inductance and C.The unidirectional conductivity of the parasitic diode in the PMOS prevents the discharge of C when the SiC MOSFET is normally turned on,and the gate of the PMOS connecting to the SiC MOSFET's gate drive resets the discharge of C when the SiC MOSFET is turned off.It avoids complex discharge reset circuits for C and ensures the consistency of the short-circuit protection current threshold in both HSF and FUL states. Practical measurements were conducted under different bus voltages and various initial junction temperatures.The proposed short-circuit protection strategy shows a minimum difference rate of only 3%in short circuits,while the traditional protection strategy exhibits a difference rate of 42%.The results demonstrate the effectiveness of the di/dt-PMOS-based short-circuit protection strategy for SiC MOSFETs.关键词
SiC MOSFET/短路耐受时间/短路保护/开尔文源极/驱动电路Key words
SiC MOSFET/short-circuit withstand time/short-circuit protection/Kelvin source/gate driver circuit分类
信息技术与安全科学引用本文复制引用
谢佳明,魏金萧,吴彬兵,丰昊,冉立..SiC MOSFET的短路耐受时间分析及其基于di/dt-PMOS的短路保护[J].电工技术学报,2025,40(16):5081-5091,11.基金项目
国家自然科学基金资助项目(52107179). （52107179）
