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远端内存访问性能优化关键技术综述

王鹿鸣 卢天越 陈明宇

高技术通讯2025,Vol.35Issue(6):565-578,14.
高技术通讯2025,Vol.35Issue(6):565-578,14.DOI:10.3772/j.issn.1002-0470.2025.06.001

远端内存访问性能优化关键技术综述

Survey of key technologies for optimizing far memory access performance

王鹿鸣 1卢天越 1陈明宇1

作者信息

  • 1. 中国科学院计算技术研究所 北京 100190||中国科学院大学 北京 100049
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摘要

Abstract

In data centers,memory demands for applications are increasing rapidly.A variety of far memory technologies that provide larger capacity but also higher access latency have been introduced into data centers.However,the longer access latency with higher variability of far memory poses challenges for conventional computer architectures.This paper systematically summarizes the challenges that far memory brings to conventional processor microarchitec-ture designs.Additionally,this paper reviews the key technologies in recent years for latency-tolerancing,summari-zing their pros and cons when applied to far memory scenarios.This paper concludes that solving the issues of ac-cessing far memory requires a cooperative software-hardware solution.Hardware provides sufficient resources to maintain outstanding memory requests,while software assists in dynamic instruction scheduling.Additionally,a balance must be struck between specialization and generality of the solution.Furthermore,mechanisms for optimi-zing branch misprediction handling need to be considered to reduce the performance impact of mis-speculation.

关键词

远端内存/内存级并行/延迟容忍

Key words

far memory/memory-level parallelism/latency tolerance

引用本文复制引用

王鹿鸣,卢天越,陈明宇..远端内存访问性能优化关键技术综述[J].高技术通讯,2025,35(6):565-578,14.

基金项目

国家重点研发计划(2022YFB4500403)资助项目. (2022YFB4500403)

高技术通讯

OA北大核心

1002-0470

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