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基于SRIO+LVDS的高速稳定传输的设计与实现

文丰 鲁屿璠 汪羽迪 李辉景

电子器件2025,Vol.48Issue(4):769-774,6.
电子器件2025,Vol.48Issue(4):769-774,6.DOI:10.3969/j.issn.1005-9490.2025.04.008

基于SRIO+LVDS的高速稳定传输的设计与实现

Design and Implementation of High-Speed Stable Transmission Based on SRIO+LVDS

文丰 1鲁屿璠 1汪羽迪 2李辉景1

作者信息

  • 1. 中北大学电子测试技术国家重点实验室,山西太原 030051
  • 2. 北京工业大学都柏林国际学院,北京 100124
  • 折叠

摘要

Abstract

A solution for stable high-speed data transmission based on Serial RapidIO+LVDS with FPGA is proposed to address the prob-lems of broken links and frame loss error codes during high-speed fiber optic data transmission.For the hardware part,the SRIO interface circuit and the LVDS interface circuit are designed to receive,store and playback the telemetry fiber optic data.The logic part realizes the reset and link reconstruction in case of link breakage by monitoring the SRIO link status flag bit in real time,and CRC checksum and re-transmission mechanism is added at the data readback end to improve the reliability of data transmission.The design has been verified by extensive tests,achieving stable transmission at 2.5 Gbit/s over 30 m of fibre optic cable without error codes or loss of numbers.

关键词

SRIO/LVDS/链路重连/零误码率

Key words

SRIO/LVDS/link reconnect/zero bit error rate

分类

信息技术与安全科学

引用本文复制引用

文丰,鲁屿璠,汪羽迪,李辉景..基于SRIO+LVDS的高速稳定传输的设计与实现[J].电子器件,2025,48(4):769-774,6.

电子器件

1005-9490

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