单片机与嵌入式系统应用2025，Vol.25Issue(10)：1-9,9.DOI:10.20193/j.ices2097-4191.2025.0066
基于RRAM的神经常微分方程网络全模拟架构设计
Design of RRAM-based fully analog compute-in-memory architecture for Neural ODEs
孙玉丽 1燕博南 1陶耀宇 1杨玉超1
作者信息
- 1. 北京大学软件与微电子学院,北京 100871
- 折叠
摘要
Abstract
Neural ordinary differential equation(ODE)network inference in Von Neumann architectures faces problems like the"power wall"and"memory wall".Traditional in-memory computing architectures also suffer from excessive time and power consumption due to numerous digital-to-analog and analog-to-digital conversions.To address these issues,we propose a fully analog compute-in-memory ar-chitecture for Neural ODEs based on RRAM to achieve fully analog data flow in network inference.The simulation is completed on the Cadence Virtuoso platform,which includes RRAM device,array,and the peripheral circuits.The test is performed on a 40 nm RRAM test platform and differential input/output PCB,achieving functional verification of the entire system.Experiments and evaluations of the classification tasks of Neural ODEs are conducted with testing errors,ultimately proving the functionality and reliability of the archi-tecture.This lays a solid foundation for subsequent hardware implementation and application deployment.关键词
RRAM存内计算/神经常微分方程/全模拟数据流/架构设计Key words
RRAM-based compute-in-memory/neural ordinary differential equation/fully analog data flow/architecture design分类
信息技术与安全科学引用本文复制引用
孙玉丽,燕博南,陶耀宇,杨玉超..基于RRAM的神经常微分方程网络全模拟架构设计[J].单片机与嵌入式系统应用,2025,25(10):1-9,9.
