测控技术2025，Vol.44Issue(10)：54-60,7.DOI:10.19708/j.ckjs.2025.08.240
基于XC7K325T的星载抗SEU系统设计
Design of Spaceborne Anti-SEU System Based on XC7K325T
摘要
Abstract
To address the mitigation of single-event upset(SEU)and the need for on-orbit reconfiguration of the SRAM-based FPGA XC7K325T,a spaceborne anti-SEU system is designed.The hardware architecture con-sists of a Flash-based FPGA(A3P1000),XC7K325T,MRAM,and three Flash memory chips,supporting con-figuration,refresh,and on-orbit reconfiguration of the XC7K325T.For data storage,a fault-tolerant design com-bining triple modular redundancy(TMR)and error correction and detection coding is implemented to mask er-rors at any single-chip address and correct up to 4 bit errors per sector.A blind refresh strategy with a 6 s cycle is implemented for the configuration SRAM.The reconfiguration mechanism incorporates resumable data trans-mission to address 5 typical anomaly scenarios during data upload processes.Experimental results demonstrate that the system effectively repairs SEU-induced errors in the configuration SRAM and achieves reliable on-orbit reconfiguration across multiple anomaly scenarios.Communication equipment based on this architecture has demonstrated stable in-orbit operation,providing valuable references for anti-SEU designs in other SRAM-based FPGA systems.关键词
FPGA/单粒子翻转/在轨重构/盲刷新/可靠性Key words
FPGA/SEU/on-orbit reconfiguration/blind refresh/reliability分类
信息技术与安全科学引用本文复制引用
刘昌华,蔡纵豪,龚乐为,吴雅婷,聂际敏,张俊杰..基于XC7K325T的星载抗SEU系统设计[J].测控技术,2025,44(10):54-60,7.基金项目
上海市科委项目(22511100902) （22511100902）
