集成电路与嵌入式系统2025，Vol.25Issue(11)：38-46,9.DOI:10.20193/j.ices2097-4191.2025.0080
面向智能感知的全模拟存内计算架构设计
Design of an all-analog computing-in-memory architecture for smart sensing
摘要
Abstract
In resource-constrained near-sensor smart sensing systems,the deployment of deep neural networks(DNNs)faces severe challenges in terms of energy efficiency and area.Computing-in-memory(CIM)architecture circumvents the data movement overhead of the Von Neumann architecture by performing parallelized multiply-accumulate(MAC)operations in-situ within memory arrays,achie-ving significant improvements in both energy efficiency and area efficiency.However,as the bit-width and scale of MAC computation in-crease,high-precision analog-to-digital conversion and digital-to-analog conversion and long-distance data routing will lead to unacceptable energy and latency overheads,reducing the energy efficiency of CIM.Aiming at the above situation,this work proposes an all-analog CIM macro supporting multi-bit MAC.The design employs grouped row capacitors scheme for DAC-less parallel conversion of multi-bit input activation(IA).Integrated C-2C capacitor ladders perform weighting of signed multi-bit weights within the analog MAC core.The proposed macro is implemented in TSMC 22 nm process with a power consumption of 0.128 mW and an area of 0.06 mm2.The meas-ured throughput is 76.8 GOPS,achieving a high energy efficiency of 600 TOPS/W and an area efficiency of 1.28 TOPS/mm2.关键词
智能感知/深度神经网络/多比特乘累加/存内计算/数/模转换/模/数转换/全模拟Key words
smart sensing/DNN/multi-bit MAC/computing-in-memory/ADC/DAC/all-analog分类
计算机与自动化引用本文复制引用
王茼,任二祥,李汉文,骆丽,魏琦,乔飞..面向智能感知的全模拟存内计算架构设计[J].集成电路与嵌入式系统,2025,25(11):38-46,9.基金项目
新疆维吾尔自治区重点研发计划项目(No.2022B01008-3) （No.2022B01008-3）
北京市自然科学基金资助(L253009) （L253009）
国家自然科学基金项目(No.62334006) （No.62334006）
