广东工业大学学报2025，Vol.42Issue(6)：12-17,6.DOI:10.12052/gdutxb.250044
基于RISC-V处理器的认证加密紧耦合芯片设计
A Design of Tightly Coupled Chip for Authentication Encryption Based on RISC-V Processor
摘要
Abstract
With the rapid proliferation of Internet of Things(IoT)technology,efficient data encryption in resource-constrained environments has become a critical issue hindering further development.Traditional encryption algorithms struggle to balance data confidentiality and integrity at low hardware resource consumption.In contrast,authenticated encryption techniques offer a robust security guarantee with minimal computational and memory overhead,making them an efficient solution for low-cost devices.This paper combines the flexibility of the RISC-V architecture with the efficiency of authenticated encryption algorithms,proposing a secure kernel that integrates authentication algorithms.This kernel tightly couples the general-purpose registers of the RISC-V core with dedicated computational modules,utilizing extended instructions for hardware acceleration to enhance the effective protection of data in IoT devices.Experimental results indicate that,compared with traditional coprocessor solutions,this design reduces logical resource consumption by approximately 60%while saving all additional register resources.Additionally,it provides about a 150-fold acceleration compared with pure software implementations.The proposed core module can deliver equivalent acceleration for other algorithms with similar underlying operators,demonstrating significant flexibility.This research offers an efficient and scalable encryption solution for modern IoT devices.关键词
RISC-V/认证加密/轻量级/硬件加速/Deoxys-iiKey words
RISC-V/authenticated encryption/lightweight/hardware acceleration/Deoxys-ii分类
信息技术与安全科学引用本文复制引用
方炜楷,詹瑞典,蔡述庭,熊晓明..基于RISC-V处理器的认证加密紧耦合芯片设计[J].广东工业大学学报,2025,42(6):12-17,6.基金项目
广东省重点领域研发计划项目(2022B0701180001) （2022B0701180001）
