佛山科学技术学院学报（自然科学版）2025，Vol.43Issue(6)：33-38,6.
一种基于180 nm CMOS工艺的超高频忆阻电路设计
Design of an ultra-high-frequency memristor circuit based on 180 nm CMOS process
摘要
Abstract
This paper presents an ultra-high-frequency integrated memristor circuit designed based on the SMIC 180 nm CMOS process.The circuit utilizes a four-transistor configuration,exploiting the nonlinear switching characteristics of MOSFET and gate voltage control to achieve memristive behavior.The design was simulated and validated using Cadence simulation software.The results indicate that:the proposed memristor circuit features a simple topology with a compact layout area of merely 45 μm2 and a power consumption of 14.04 μW at 1 GHz;operating under a±0.9 V DC supply,the circuit achieves a maximum operating frequency of 1 GHz and exhibits well-defined hysteresis loops across the frequency range from 500 MHz to 1 GHz;the implemented Chua chaotic circuit demonstrates robust chaotic performance,suggesting its potential applications in chaotic integrated circuits,information security,and related domains.关键词
集成忆阻电路/超高频/磁滞回线Key words
integrated memristor circuit/ultra-high-frequency/hysteresis loop分类
信息技术与安全科学引用本文复制引用
杨达亿,于昕梅..一种基于180 nm CMOS工艺的超高频忆阻电路设计[J].佛山科学技术学院学报（自然科学版）,2025,43(6):33-38,6.基金项目
广东省普通高校重点实验室资助项目(2021KSYS008) （2021KSYS008）
