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面向芯粒互连的低延迟AXI适配器设计

陈佳敏 李翔宇 殷树娟

现代电子技术2025,Vol.48Issue(24):1-9,9.
现代电子技术2025,Vol.48Issue(24):1-9,9.DOI:10.16652/j.issn.1004-373x.2025.24.001

面向芯粒互连的低延迟AXI适配器设计

Design of low latency AXI adapter for chiplet interconnection

陈佳敏 1李翔宇 2殷树娟1

作者信息

  • 1. 北京信息科技大学 理学院,北京 102206
  • 2. 清华大学 集成电路学院,北京 100084
  • 折叠

摘要

Abstract

Die-to-die(D2D)interconnection technology is a key technology that affects chip performance.The interconnection of chips should meet the requirements of low latency,high bandwidth,low power consumption,and high reliability as much as possible.However,the existing standards do not provide sufficient support for mainstream on-chip buses and require D2D adaptation solutions compatible with AXI and other buses.In response to the above requirements,a D2D adapter that supports AXI bus is designed.On the basis of layered chip interconnect interface transmission protocol architecture,the hardware design of protocol layer and data link are implemented.In order to hide the packaging delay as much as possible,an active business channel data merging(concatenation)strategy is proposed in the hardware implementation of the protocol layer.In the data link layer,the automatic repeat request(ARQ)retransmission mechanism based on n-backoff is adopted to meet the requirements of low delay,small area and low bit error rate of inter core interconnection.The register transfer level design of the adapter was implemented by means of the hardware description language System Verilog,and was synthesized based on the TSMC28nm process library.The experimental results show that the system latency was 11.02 ns and the power consumption was 15.58 mW.In comparison with UCIe interface controller,the latency was reduced by 16%and the power consumption was reduced by 22.5%,meeting the demand of on-chip bus adaptation with lower latency and power consumption.

关键词

芯粒互连/AXI总线/适配器/协议层/数据链路层/低延迟/n-回退的自动重发请求(ARQ)重传机制

Key words

D2D interconnection/AXI bus/adapter/protocol layer/data link layer/low latency/n-backoff automatic repeat request(ARQ)retransmission mechanism

分类

信息技术与安全科学

引用本文复制引用

陈佳敏,李翔宇,殷树娟..面向芯粒互连的低延迟AXI适配器设计[J].现代电子技术,2025,48(24):1-9,9.

基金项目

国家自然科学基金青年项目:基于模态局部化的高分辨力微型电场传感器研究(62101054) (62101054)

现代电子技术

OA北大核心

1004-373X

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