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Design of a parallel configurable forward feedback equalization dual-mode high-speed SerDes transmitter

REN Yifan ZHANG Chunming SONG Yidi

High Technology Letters2025，Vol.31Issue(4)：P.407-414,8.

High Technology Letters2025，Vol.31Issue(4)：P.407-414,8.DOI:10.3772/j.issn.1006-6748.2025.04.010

Design of a parallel configurable forward feedback equalization dual-mode high-speed SerDes transmitter

REN Yifan ¹ZHANG Chunming ¹SONG Yidi¹

作者信息

1. School of Electronic Engineering,Xi’an University of Posts and Telecommunications,Xi’an 710121,P.R.China
折叠

摘要

关键词

digital signal processing/digital-to-analog conversion/parallel configurable forward feedback equalization/dual-mode transmitter/source series termination driver/4∶1 multiplexers

分类

信息技术与安全科学

引用本文复制引用

REN Yifan,ZHANG Chunming,SONG Yidi..Design of a parallel configurable forward feedback equalization dual-mode high-speed SerDes transmitter[J].High Technology Letters,2025,31(4):P.407-414,8.

基金项目

Supported by the National Key R&D Program Broadband Communications and New Network Key Special Project(No.2019YFB1803600). （No.2019YFB1803600）

High Technology Letters

ISSN：1006-6748

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