半导体学报（英文版）2025，Vol.46Issue(12)：58-66,9.DOI:10.1088/1674-4926/25030043
Simulation and fabrication of vertical channel transistors with self-aligned high-κ metal gates using ion implantation for source/drain doping
Simulation and fabrication of vertical channel transistors with self-aligned high-κ metal gates using ion implantation for source/drain doping
Penghui Sun 1Yongkui Zhang 2Jun Luo1
作者信息
- 1. School of Integrated Circuits,University of Chinese Academy of Sciences,Beijing 100049,China||Integrated Circuit Advanced Process R&D Center,Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,China
- 2. Integrated Circuit Advanced Process R&D Center,Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,China
- 折叠
摘要
关键词
vertical channel transistor/source/drain ion implantation/on-state current/dummy gatesKey words
vertical channel transistor/source/drain ion implantation/on-state current/dummy gates引用本文复制引用
Penghui Sun,Yongkui Zhang,Jun Luo..Simulation and fabrication of vertical channel transistors with self-aligned high-κ metal gates using ion implantation for source/drain doping[J].半导体学报（英文版）,2025,46(12):58-66,9.
