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基于开源处理器的间接访问数据预取器设计

ZONG Pengchen QU Shaoru ZHAO Wenzhe REN Pengju XIA Tian

集成电路与嵌入式系统2026,Vol.26Issue(1):47-53,7.
集成电路与嵌入式系统2026,Vol.26Issue(1):47-53,7.DOI:10.20193/j.ices2097-4191.2025.0082

基于开源处理器的间接访问数据预取器设计

Design of differential-matching prefetcher based on open-source CPU

ZONG Pengchen 1QU Shaoru 1ZHAO Wenzhe 1REN Pengju 1XIA Tian1

作者信息

  • 1. National Key Laboratory of Human-Machine Hybrid Augmented Intelligence,National Engineering Research Center of Visual Information and Applications,Institute of Artificial Intelligence and Robotics,Xi'an Jiaotong University,Xi'an 710049,China
  • 折叠

摘要

Abstract

Indirect memory accesses,prevalent in data-intensive applications such as graph processing and sparse linear algebra,exhibit irregular patterns that severely degrade cache performance due to their low spatial/temporal locality.Traditional stride-based prefetchers fail to capture such patterns where target addresses are dynamically computed through index arrays.This paper proposes a dynamic multi-pattern-aware prefetcher(DMP)to address these challenges.DMP introduces a lightweight shifted differential matching mecha-nism to autonomously identify indirect access patterns by comparing index data sequences with target address sequence.Implemented on the open-source XuanTie C910 RISC-V processor,DMP reduces L1 data cache miss rates by 27.3%and achieves speedups of 1.07~1.22 timed for Sparse Matrix-Vector Multiplication(SpMV)algorithm.This work provides a hardware-efficient solution for non-contiguous memory access patterns in modern processors.

关键词

数据预取/间接内存访问/缓存优化/非连续访问/硬件高效性/非规则访存

Key words

data prefetching/indirect memory access/cache optimization/non-contiguous access/hardware efficiency/irregular workloads

分类

信息技术与安全科学

引用本文复制引用

ZONG Pengchen,QU Shaoru,ZHAO Wenzhe,REN Pengju,XIA Tian..基于开源处理器的间接访问数据预取器设计[J].集成电路与嵌入式系统,2026,26(1):47-53,7.

基金项目

国家自然科学基金(62088102) (62088102)

国家自然科学基金(62302381) (62302381)

国家重点研发计划项目(2022YFB4500500) (2022YFB4500500)

集成电路与嵌入式系统

1009-623X

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